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Super Game Boy Clock Mod

The original release of the Super Game Boy runs about 4% faster than an original Game Boy.  This is most noticeable in the audio playback, but it also means that the SGB is not allowed for use in speed-running, and is part of the reason why there is no link port available, since the speed difference would cause the communication to desync.  The later Japan-only Super Game Boy 2 fixed this problem by installing a crystal oscillator running at the correct speed.  There have been mods floating around online showing how to replace the clock in the SGB1 with a crystal oscillator running at the original Game Boy's speed.  However, the way these other mods are done actually breaks some cool features of the Super Game Boy where it's possible to speed up and slow down the gameplay using the Super Game Boy Commander controller from Hori.  After looking into the issue, I came up with my own mod, which not only retains that feature, but is also much easier to install (other mods require lifting pins on the CPU and carefully soldering wires to them).


Installation is simple.  First, remove the three components outlined in red (R1, R7, C15) and clean the pads of R1 with desoldering braid so they are nice and flat.  Next, place the board down and solder it to the four pads outlined in green (leave C5 on the board and just solder onto the left side of it).  Finally, if the board was delivered with the crystal separate, trim the leads and solder the crystal down to the available pads on the side of the PCB.  Early revisions of the clock board placed the crystal in a position where it was directly under a plastic standoff in the cart shell, which caused issues requiring the crystal to be mounted at a slight upward angle in order to avoid the standoff.  Later revisions have fixed this by moving the crystal's mounting pads.

 

A few notes for anyone wanting to create their own version of this mod rather than just buying one from me:
  • The ICD2-R chip expects an input clock speed exactly 5x the Game Boy's system clock speed.  The Game Boy runs at 4.1943MHz, which is a standard, easy to find crystal value.  5 * 4.1943 = 20.9715MHz, which is not a standard value.  This likely explains why Nintendo chose to use the SNES system clock, which is only ~4.5% faster than the correct speed.  They actually had to have a custom crystal manufactured for the Super Game Boy 2.  While it is possible to get custom crystals manufactured in relatively small quantities, I elected instead to use a PLL with a standard crystal.  Unfortunately, 5x PLL's are not easy to find in a cheap, small package.  However, I managed to luck out and find a crystal that is 2x the Game Boy clock speed, and a cheap PLL with a 2.5x multiplier in a SOIC-8 package, which is what I'm using here.
  • The ICD2-R chip does contain an oscillator circuit capable of directly connecting a 2-pin crystal like the one used in the SGB2 on pins 18 (CLKI) and 19 (CLKO).  If you choose to do this (and are able to find a proper crystal to do so), you will want to remove the same three components shown above, then replace R1 with a 100K ohm resistor.  R1 is connected between pins 18 and 19 on the ICD2-R, so you can use these pads for soldering the crystal, or if you want to build a castellated PCB like I did, you can use those pads as mount points for the PCB.  The large gold pad at the top-left corner of the ICD2-R is a ground pad.  If you're using a crystal directly, you won't need Vcc from the left side of C5.  Just replace the resistor, connect the crystal, and add proper load capacitors to ground (be sure to calculate the proper load capacitor values for your crystal).
  • If you choose to use a PLL like I did, or another single-ended clock signal like a programmable oscillator, you will only need to remove the two components in the lower-right section of the board unless you intend to use the R1 pads for mounting a PCB like I did.  You will then need to add those components in series after the output of your clock signal, with one slight but very important change.  In the original design, the incoming clock signal goes into a series 33pF capacitor, and then into a series 510 ohm resistor, then finally into the ICD2-R CLKI pin (pin 18).  Finally, there is a 510K ohm resistor between the ICD2-R CLKI and CLKO pins.  The one change that needs to be made is to adjust for the much lower trace capacitance due to the shorter traces (assuming you're mounting your clock circuit very close to the chip like I did here.  I wasn't able to measure the actual capacitance since my multimeter's capacitance function is broken (and probably wouldn't be accurate at such small scale anyway), but using an oscilloscope to measure the output voltage, I determined 18pF to be a good value.  Your results may vary, you should check the voltage level on pin 18.  The proper voltage level is 2Vpp with a 2V DC offset, meaning the signal should go from 1V (low) to 3V (high).  If the signal is too low, both in amplitude and offset, reduce the capacitor.  If the signal is too high, increase it.  If the amplitude is correct but the offset is not, adjust the 510 ohm resistor instead.